DRV8305-Q1: DRV8305-Q1 SPI / Registers

Part Number:DRV8305-Q1

Hello,

I have a couple of questions regarding communication behavior of DRV8305.

1. What happens if a SPI command is not transmitted completely (e.g. if MCU starts transferring SPI command, reset occurs before finish sending)? Is the command ignored?
2. When will control status and error register in context with voltage levels of inputs PVDD, WAKE and EN_GATE be set to their default value?
3. How can aforementioned registers set back to default values? Only when device powers up or enters sleep mode?
4. How can registers be cleared without a change on voltage level on PVDD and WAKE?
5. If PVDD is not connected but Vreg/Vref pin is still supplied, DRV8305 stays active.
   1. Is this behavior known?
   2. What problems can be expected?

Thanks for your answers-best regards,
Jonas