Part Number:DRV8305
Hello,
Regarding to nFault and GHA output on DRV8305, my customer is asking some question.
They have some problem at driving motor on their application.
(Their conditions on DRV8305)
PVDD : 24V
VREG : 5V (24V -> (Regulator) ->5V)
EN_GATE : Host control
(Question)
(1) When they configured VREG and EN_GATE at power on, nFault is toggled with about 64us period.
(It seems that when EN_GATE is high, nFault stop to toggle and goes to high.)
Please attached file.
According to datasheet(page32:7.4.1 Power Up Sequence),
"nFAULT will be driven low to indicate that the device has not reached the VPVDD_UVLO2 threshold."
In case of thier application, nFault output is correct? Or something problem is happened while power on?
(2)When INH and INL are set Low at starting motor drive, GHA output is not Low. (It’s High.)
Please attached file.
Is it correctly operation? Can GHA be set as Low(0V) at INH/INL=Low?
Regards,
Tao_2199
(Please visit the site to view this file)