Hello forum members,
I've been facing an issue with the GVDD pin on my electronic circuit, and I'm hoping to get some insights and guidance from the community. The problem occurs when the voltage supplied to the GVDD pin falls below 5V or rises above 15V. I want to operate the circuit in the range of 20V-55V. I suspect that this undervoltage condition might be causing certain malfunctions in the circuit. I have attached my schematic diagram for reference.
Observations:
The buck converter is working correctly from 5V to 45V.
The layout is designed according to TI guidelines.
Here are my questions:
How does the GVDD pin function for voltage below 5V and above 15V? What are the potential consequences of these voltage ranges on the performance and reliability of the circuit?
What could be the reasons behind the GVDD pin experiencing voltage outside the specified range? Are there any common pitfalls that might lead to this issue?
Are there any recommended circuit protection mechanisms or measures to prevent GVDD undervoltage situations? How can I safeguard my circuit against potential damages?
Are there any best practices for troubleshooting and identifying the root cause of GVDD undervoltage occurrences? What tools or techniques can I use to pinpoint the problem?
If anyone has encountered a similar GVDD undervoltage issue before, could you share your experiences and the steps you took to resolve it?
A few observed waveforms are attached below.
PWRGD
Input Pulses
Between CP1 and GND
CP2 and GND
EN_GATE Signal
DVDD Signal
AVDD Signal
In the range between 5V to 15V Input Voltage, GVDD becomes 10V. Still, output pulses are not observed.
Above 15V it becomes 1.68V fixed and the fault pin becomes low.
I am not using DRV8301 with SPI mode.
Any assistance or advice you can provide will be greatly appreciated. Thank you in advance for your support!
