DRV3201-Q1: I can read the status reg, but I can not write the cofiguration reg by SPI

Now I am using the GDU of DRV3201, in the init function, firsty I write the CFG0 and CFG1 with 0x39 and 0x3f, sencond  i read the CFG0 and CFG1, they are all 0x3f(default value), I think there are some errors with my writting function, 

I read the STAT0 /STAT1/STAT2, they are 0x00, 0x94,0x07, that mean the SPI is OK.