Part Number:DRV10964
Hi Team,
My customer is currently evaluating the DRV10964 for use in an application that calls for very tight phase locked control of the motor to an external reference (+/-40ns). They have implemented this on past products using an FPGA to implement a phase detector, digital compensation and control output to the motor. The feedback to the phase detector is a 60Hz signal derived from the motor. In this implementation I have very fine resolution to the BLDC control, on the order of 6E-5 Hz/count.
In trying to implement this design using the DRV10964 they are running into issues allocating the gains in the loop and just realized that the input to the DRV10964 is digitized (with 9-bits) and is not an analog input. So they are starting to think that the DRV10964's PWM architecture may not be the best fit. Can you provide more detail of the PWM processing portion of the DRV10964 to help in this decision? (Filter bandwidths, discrete timing, etc.).
Also, do we have any similar drivers that accept an analog input without internal discretization?
Thanks,
Mitchell