Part Number:DRV3205-Q1
Hi,
I'm having trouble communicating with the DRV-3205Q1 over SPI. Currently the SPI master is running at 1Mhz. I've measured the different timing limitations and they all seems to be within the valid range. However, when I try to communicate with the DRV3205, e.g reading CFG0 register the MISO data does not correspond with the reset value in the datasheet. I've "decoded" the SPI data manually and I get the same data representation at the master side, so the SPI setup seems to be working as it should.
Sequence:
EN = HIGH
DRVOFF = HIGH
wait until M_ERR = HIGH (~9ms, state should be > RESET (?))
perform register read
NOTE: SPI data transfer is carried out with 16 bits of data, CS is active (low) during the whole transmission.
Could you give my any hints on how to troubleshoot this?
What is the bare-minimum in order to be able to communicate over SPI?