Part Number:DRV8308
Hello my friends.
Our company manufacture Black and white laser printer. DRV8038 have been designed in one of our printer with 40PPM to drive a BLCD motor. DRV8038 works in internal register mode from 120 three-hall commutation to 180 sine commutation automatically. DRV8038 have been normally drived its BLCD motor in obverse direction and inverse direction.
the question is that: When DRV8038 drive only some wheel gear with smaller moment of force, BLCD motor run faster. When DRV8038 drive wheel gear and fuser + roller with larger moment of force, BLCD motor run slower. When DRV8038 drive wheel gear and fuser + roller and cartridge with largest moment of force, BLCD motor run slowest. But the SPI register values are never changed.
Our company also have been applied some other motor module (a BLCD motor and its matching drivers) in our printer products, such as NEDIC, and never occur this. The motor module always run at the same speed with various moment of force. if moment of force is too larger to motor module, it will be stop but not become slow.
We hope DRV8038 can drive its BLCD motor reach to 40PPM, but not become slower and slower. Or maybe DRV8308 is not fit, please recommend match model.
This is the first time for our company to self-design motor driver with TI, we have not enough experience. Please help us. The internal register is config as follows. whether this configration have some errors or not?
// CTRL1 Register
G_CTRL1_REG.Address = 0x00;
G_CTRL1_REG.AG_SETPT = 9; //=1.5KHz (AutoGain = LOOPGAIN * fCLKIN / AG_SETPT)
G_CTRL1_REG.ENPOL = 0x0; //device active when ENABLE is high
G_CTRL1_REG.DIRPOL = 0x0; //normal direction when DIR is high
G_CTRL1_REG.BRKPOL = 0x0; //brake when BRAKE is high
G_CTRL1_REG.SYNRECT = 0x1; //enble Synchronous rectification for better speed control and higher efficiency
//G_CTRL1_REG.PWMF = 0x0; //SPEED=1500高速+PWMF=025KHz/40us:U-Duty(24V)=14.4us,U-120°=4.51ms faster
G_CTRL1_REG.PWMF = 0x1; //SPEED=1500高速+PWMF=050KHz/20us:U-Duty(24V)=7.00us,U-120°=4.77ms fast
//G_CTRL1_REG.PWMF = 0x2; //SPEED=1500高速+PWMF=100KHz/20us:U-Duty(24V)=3.26us,U-120°=5.33ms slow
//G_CTRL1_REG.PWMF = 0x3; //SPEED=1500高速+PWMF=200KHz/05us:U-Duty(24V)=1.20us,U-120°=7.76ms slower
//G_CTRL1_REG.SPDMODE = 0x0; //Clock frequency mode
//G_CTRL1_REG.SPDMODE = 0x1; //Clock PWM mode (PWMF有效 MOD120=有效 CLKIN无效)
G_CTRL1_REG.SPDMODE = 0x2; //Internal register PWM mode (PWMF有效 MOD120=有效 CLKIN无效)
G_CTRL1_REG.FGSEL = 0x0; //0:Use HALL_U to generate FG 1:Use XOR of all 3 Hall sensors 2:Use FG amplifier input 3:Use TACH input
//G_CTRL1_REG.BRKMOD = 0x0; //Coast when ENABLE is inactive (outputs 3-state)
G_CTRL1_REG.BRKMOD = 0x1; //Brake when ENABLE is inactive (outputs 3-state)
G_CTRL1_REG.RETRY = 0x1; //Automatic retry in case of fault
// ADVANCE Register
G_ADVANCE_REG.Address = 0x01;
G_ADVANCE_REG.ADVANCE = 33; //commutation timing behind versus Hall-signals (33/960*Hall_U period)
// COMCTRL1 Register
G_COMCTRL1_REG.Address = 0x02;
//G_COMCTRL1_REG.SPDREVS = 3; //003*2.56ms= 7.68ms minimum Hall_U periods from reach before LOCK to be set
G_COMCTRL1_REG.SPDREVS = 4; //004*2.56ms=10.24ms minimum Hall_U periods from reach before LOCK to be set
//G_COMCTRL1_REG.MINSPD = 50; //195*2.56ms=499.2ms minimum Hall_U periods from brake before LOCK can be set
//G_COMCTRL1_REG.MINSPD = 180; //180*2.56ms=460.8ms minimum Hall_U periods from brake before LOCK can be set
G_COMCTRL1_REG.MINSPD = 195; //195*2.56ms=499.2ms minimum Hall_U periods from brake before LOCK can be set
// MOD120 Register
G_MOD120_REG.Address = 0x03;
G_MOD120_REG.BASIC = 0x0; //permit 120°single/1-Hall or 180°sinusoidal commutation
//G_MOD120_REG.BASIC = 0x1; //force 120°standard/3-Hall commutation and disable ADVANCE function
//G_MOD120_REG.SPEEDTH = 0x5; //speed variation allowed across Hall_U periods while LOCK keeping set =6.25%
G_MOD120_REG.SPEEDTH = 0x6; //speed variation allowed across Hall_U periods while LOCK keeping set =12.5%
G_MOD120_REG.MOD120 = 3970;//smooth transition from 120°operation to 180°operation
//G_MOD120_REG.MOD120 = 4095;//SPEED=1500高速+PWMF=100kHz/10us:U-Duty(24V)=6.9us,U-120°=3.32ms
//G_MOD120_REG.MOD120 = 3048;//SPEED=1500高速+PWMF=100kHz/10us:U-Duty(24V)=5.1us,U-120°=3.32ms
//G_MOD120_REG.MOD120 = 2048;//SPEED=1500高速+PWMF=100kHz/10us:U-Duty(24V)=3.3us,U-120°=5.3ms
//G_MOD120_REG.MOD120 = 1048;//SPEED=1500高速+PWMF=100kHz/10us:U-Duty(24V)=1.4us,U-120°=15ms
// DRIVE Register
G_DRIVE_REG.Address = 0x04;
G_DRIVE_REG.LRTIME = 0x0;
G_DRIVE_REG.HALLRST = 0x0; //sets how many HALL_U cycles pass for each commutation counter reset. In other words,
//the commutation counter is reset every N HALL_U edges. Selections available are 1, 2, 4, and 8.
G_DRIVE_REG.DELAY = 0x0; //Config ADVANCE behind Hall-signals
//G_DRIVE_REG.DELAY = 0x1; //Config ADVANCE before Hall-signals
G_DRIVE_REG.AUTOADV = 0x0; //Disable automatic advance compensation
//G_DRIVE_REG.AUTOADV = 0x1; //Enable automatic advance compensation 转得快多了
G_DRIVE_REG.AUTOGAIN = 0x1; //Enable automatic gain compensation
//G_DRIVE_REG.ENSINE = 0x0; //select 120°single-Hall commutation (BASIC=0)
G_DRIVE_REG.ENSINE = 0x1; //select 180°sinusoidal commutation (BASIC=0)
G_DRIVE_REG.TDRIVE = 0x1; //=5us Predriver high-current drive time
G_DRIVE_REG.DTIME = 0x0;
G_DRIVE_REG.IDRIVE = 0x0; //=10mA Predriver output peak current
//G_DRIVE_REG.IDRIVE = 0x2; //=30mA 反转有时不对
G_DRIVE_REG.IDRIVE = 0x3; //=50mA Predriver output peak current
//G_DRIVE_REG.IDRIVE = 0x4; //=90mA all 120°commutation, error???
// SPDGAIN Register
G_SPDGAIN_REG.Address = 0x05;
G_SPDGAIN_REG.INTCLK = 0x3; //50MHz/2^3=6.25MHz
//G_SPDGAIN_REG.INTCLK = 0x5; //50MHz/2^5=1.5625MHz
G_SPDGAIN_REG.SPDGAIN = 0x007;//无效
// FILK1 Register
G_FILK1_REG.Address = 0x06;
G_FILK1_REG.HALLPOL = 0x0; //Hall signal logic levels are direct must=0
G_FILK1_REG.BYPFILT = 0x0; //Enble the filter that FILK1 and FILK2 configure
G_FILK1_REG.FILK1 = 1200; //Filter coefficient for pole frequency [100Hz~1600Hz] 1200=573.521Hz
// FILK2 Register
G_FILK2_REG.Address = 0x07;
G_FILK2_REG.FILK2 = 950; //Filter coefficient for zero frequency [2Hz~100Hz] 950=56.286Hz
// COMPK1 Register
G_COMPK1_REG.Address = 0x08;
G_COMPK1_REG.BYPCOMP = 0x0; //Enble the compensator that COMPK1 and COMPK2 configure
G_COMPK1_REG.COMPK1 = 300; //Compensator coefficient for pole frequency 300=142.3935Hz
// COMPK2 Register
G_COMPK2_REG.Address = 0x09;
G_COMPK2_REG.AA_SETPT = 0x0; //=3Hz (AutoAdvance = ADVANCE * fHall_U / AA_SETPT)
G_COMPK2_REG.COMPK2 = 600; //Compensator coefficient for zero frequency 600=35.537Hz
// LOOPGN Register
G_LOOPGN_REG.Address = 0x0A;
G_LOOPGN_REG.OCPDEG = 0x3; //Deglitch time for VFETOCP to trigger=5us / OCP deglitch time to ignore voltage spikes=5us
G_LOOPGN_REG.OCPTH = 0x3; //Protection threshold for VFETOCP(FET's drain to source overvoltage=1V for overcurrent protection)
G_LOOPGN_REG.OVTH = 0x0; //Protection threshold for VOVLO(VM overvoltage=29V) <?? 0=29V 1=34V ??>
//G_LOOPGN_REG.OVTH = 0x1; //Protection threshold for VOVLO(VM overvoltage=34V) <?? 0=29V 1=34V ??>
G_LOOPGN_REG.VREF_EN = 0x0; //VREG enabled only when ENABLE is active
G_LOOPGN_REG.LOOPGAIN = 100; //Sets the overall gain for the speed control loop
G_LOOPGN_REG.LOOPGAIN = 40; //Sets the overall gain for the speed control loop
Thks & Rgds