Part Number:DRV10983
Hi Supporting team:
I found there is a fixed 330mS time slot between the wake up mode (Vreg on) to the align mode , please check the plot below ,
channel 1: customer system signal (regardless) channel 2 : Speed pin (analog speed ) channel3 : Vreg channel4: U phase
t2 is the time that drv10983 wake up , t3 is the time that entering the align mode.
Question 1 : I need to clarify the time between t2 to t3 , what's the 10983 doing during this time ?
Question 2 : If possible , can we tune the speed by the voltage on the speed pin during this time , does it take effect? During this time , could the internal ADC on the speed pin work and update the speed information ?
