MCT8316A-Q1: I2C 100us Delay clarification

Tool/software:

Hi TI team,

We’re integrating this in our design and need clarification on the 100us delay between bytes recommendation. I’ve seen mixed guidance in forum threads — could you please confirm the following?

1. Is this delay mandatory or just recommended? What happens if it's not implemented?

2. Does it apply to both read and write operations, or only writes?

3. Was this behavior fixed in the latest automotive Q1 revision, or is a future silicon update planned?

4. Is this an inter-byte delay or between byte starts?

This introduces serious delays in our system, and defeats the purpose of I2C fast mode, so we’d like to understand if it’s strictly required or can be avoided, especially for read commands.

Thanks,

Horia