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DRV3901-Q1: Device timing check sequence.

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Part Number: DRV3901-Q1

Tool/software:

Hello,

In the datasheet for the DRV3901-Q1, in chapter 7. Software development guide, at the Device timing check test, at point 3 it is mentioned: "nFAULT pin will be driven with a 75% 16K Hz PWM output"

Is there a way to confirm internally that this pin is driven correctly? (like in the nFault signalling check at point 3 the assertion can be confirmed by nFAULT_PIN_STAT)

Thank you!


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