DRV3245Q-Q1: DRV3245 How are spi SDI and SDO CRC calculated? The security manual provides an obvious error about the security mechanism of SDI and SDO.

Tool/software:

1. When does the predrive DRV3245Q-Q1 start CRC calculation? Whether it can be understood as the next frame after the MCU writes SPIWR_CRC or the first frame after the device is powered on to start the internal CRC calculation.

2. It is mentioned in the data sheet that the number of internal recommended check frames is 7frame. Whether it is understood that the predrive is seven consecutive frames after a certain start flag. Is there a difference between read and write access? Does writing or reading less than 7 frames affect the internal CRC calculation?

3. For the end of internal CRC calculation, should the end be marked by 7 frames or by MCU writing the CRC calculation value to SPIWR_CRC?