Part Number:DRV8701
I assume that if we want to PWM the input to the DRV8701P, to control the average drive level, we'd hold one of the INx lines low and drive PWM into the other INx line. Assuming this is correct, what is the upper limit for the frequency of that PWM? Is it simply a calculation based on the switching characteristics, including min. dead time, of the chip and the FETs? Or are there other considerations?
Thanks,
Scott