DRV8343-Q1: Technical questions regarding some register settings

Hello team,

Let me ask several technical questions regarding some register settings.

1. Is it possible to set TDRIVE_MAX = 20 μ s if ① IDRIVE_xx = 0100b = 15 mA? 

2. If DIS_GDF = 1b (disabled), what are the risks to DRV8343S?
(For example, when there is a short circuit between the G-S of the external FET, the gate current flows too much and the DRV8343S fails.)

3. When DIS_GDF = 1b (invalid), recognized that there are not a notification by nFAULT and operation stop, is that correct that the diagnostic bits of Fault Status and DIAG Status are asserted?

4. Even if DIS_GDF = 1b (disabled) is set, is there a case where nFAULT notification or operation stops?

Thanks in advance.