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DRV8316C: ASR and AAR enable will not lead to 0V drop on LS FET if negative current is applied

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Part Number: DRV8316C

Hello,

currently we are exploring the DRV8316C and its ASR/AAR features. We are using 6xPWM Mode, not using the internal cycle-by-cycle current limitation. CSA_GAIN is 0x0, ILIM_RECIR is 0x0.

To verify the correct working of the feature, we want to set all PWM inputs to LOW. Afterwards we apply a negative current to OUTA, and expect a voltage drop induced by the body diode of LS-FET A around -0V7.

Our measurements confirm, that there is a voltage drop ~0V7 if we limit the negative current to ~1A.

Afterwards, we configure 0x07=0x0C (Control Register 5, EN_ASR and EN_ASS=0b1) and expect a voltage drop ~0V. We read back the register and the result of CCR_5 is the expected value (0x0C).

Unfortunately, we can not confirm that the voltage drop will decrease, too.

Could you please clarify, why we do not see 0V thous we enabled ASR/AAR?

Thanks,

Florian


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